1. Field of the Invention
This invention relates to computer systems employing two byte operation codes and the manner in which the two byte operation codes are mapped into control memory for use by the computing system.
2. Description of the Related Art
In the past operation codes were encoded by one byte of data, eight bits, providing a maximum of 256 operation codes for use in the computing system. In the recent past system architecture has been modified to encode some of the operation codes by two bytes of data, 16 bits, in addition to the operation codes encoded by one byte of data.
In a two byte operation code the first byte is used to define a series of operation codes and the second byte is used to define the operation code within the series. Therefore, it is possible that if all operation codes were stored as two bytes of data, the number of operation codes available to the system would be, 256.times.256, 65,536 operation codes. However, the present system architecture not need that capacity of operation codes and, therefore, at present, not all operation codes are two bytes in length. For each two byte operation code there is a possible 256 operation codes in that series. In a system using two byte operation codes it is necessary to identify those operation codes within a series of operation codes that are not being used.
A straightforward approach to this problem would be to have a control memory of sufficient size to have a unique address for each two byte operation code where the data stored in that address will identify whether or not the operation code is a valid operation code or an invalid operation code. However, this would require 256 memory addresses to be used for each two byte operation code series employed in the system design.
Another approach to addressing a control store for a two byte operation code is to have the first byte of the operation code address a control memory location which has stored therein a pointer to a microcode routine which would then decode the second byte of operation code to determine the function to be processed and whether the decoded operation code is valid or not. This is an acceptable procedure where the number of operation codes within a series of operation codes are low such that the two byte operation code may be effectively treated as a one byte operation code without losing system efficiency. However, as the number of two byte operation codes within a series of operation codes increases, the system efficiency deteriorates because of the time necessity for the microcode to decode and operate upon the two byte operation codes.